A Survey of Digital Design Reuse

toward higher performance, greater densities, and increasing system complexity, CAD tools and design methodologies struggle to keep pace. Managing the formidable complexity of the design process is one of the main challenges to IC design. Disseminating design reuse is central to bringing the design effort’s complexity back to a manageable size. Effective reuse, though, takes more than just gathering predesigned components in a library. Reuse-oriented policies and strategies must permeate the entire design process, from the methodologies themselves to the final designs. In this article, we provide a brief overview of the state of the art in design reuse for digital systems. We also discuss the challenges posed to this discipline by the recent trend toward integrating processor cores in high-volume application-specific integrated circuits. Design reuse, particularly in the core-based system-on-chip (SOC) design era, is no longer a discipline in isolation. Reuse cannot be fully separated from simulation and verification, estimation, synthesis, or test. For example, the “Design Section” of the 1999 edition of the International Technology Roadmap for Semiconductors emphasized the need for synthesis technology to support the reuse of predesigned blocks with surrounding synthesized logic, thus facilitating intellectual property (IP) reuse.1 The need for new levels of abstraction to support efficient system-level early design-space exploration, synthesis, and simulation and verification is yet another example of a synergy increase across CAD areas. Early performance estimation is also important so that top-down design methodologies can correctly evaluate design decisions at high abstraction levels, such as at the system or architectural level. Without good estimation techniques, top-down design of deep submicron technologies may be impractical, and CAD tools developed for such design would be useless. The semiconductor and electronic-design-automation (EDA) industries must successfully leverage several decades of accumulated investment in hierarchical, topdown design methodologies. Finally, standardization—namely, for system descriptions and portable synthesis library formats—is yet another critical issue in SOC design.1 Figure 1 shows the main industry players for SOC, field-programmable design.